gnmmarechal/SafeA9LHInstaller
1
0
Fork 1
mirror of https://github.com/AuroraWright/SafeA9LHInstaller.git synced 2025-06-25 21:22:45 +00:00
Code Issues Packages Projects Releases Wiki Activity

Don't initialize the SD card after a reboot on an OTPless install

Browse Source
This commit is contained in:
Aurora 2016-10-06 17:12:44 +02:00
parent ae7fc28c74
commit 5f96d42a9c
7 changed files with 27 additions and 23 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
loader/arm11/source/main.c
View File

@ -2,14 +2,14 @@
void main(void)
{
vu32 *arm11 = (vu32 *)0x1FFFFFF8;
vu32 *arm11Entry = (vu32 *)0x1FFFFFF8;
//Clear ARM11 entrypoint
*arm11 = 0;
*arm11Entry = 0;
//Wait for the entrypoint to be set
while(!*arm11);
while(!*arm11Entry);
//Jump to it
((void (*)())*arm11)();
((void (*)())*arm11Entry)();
}

6
loader/source/start.s
View File

@ -24,14 +24,14 @@
.align 4
.global _start
_start:
@ Change the stack pointer
mov sp, #0x27000000
@ Disable interrupts
mrs r0, cpsr
orr r0, #0x1C0
msr cpsr_cx, r0
@ Change the stack pointer
mov sp, #0x27000000
@ Disable caches / MPU
mrc p15, 0, r0, c1, c0, 0 @ read control register
bic r0, #(1<<12) @ - instruction cache disable

20
source/crypto.c
View File

@ -60,7 +60,7 @@ __asm__\
static void aes_setkey(u8 keyslot, const void *key, u32 keyType, u32 mode)
{
if(keyslot <= 0x03) return; // Ignore TWL keys for now
if(keyslot <= 0x03) return; //Ignore TWL keys for now
u32 *key32 = (u32 *)key;
*REG_AESCNT = (*REG_AESCNT & ~(AES_CNT_INPUT_ENDIAN | AES_CNT_INPUT_ORDER)) | mode;
*REG_AESKEYCNT = (*REG_AESKEYCNT >> 6 << 6) | keyslot | AES_KEYCNT_WRITE;
@ -85,7 +85,7 @@ static void aes_setiv(const void *iv, u32 mode)
const u32 *iv32 = (const u32 *)iv;
*REG_AESCNT = (*REG_AESCNT & ~(AES_CNT_INPUT_ENDIAN | AES_CNT_INPUT_ORDER)) | mode;
// Word order for IV can't be changed in REG_AESCNT and always default to reversed
//Word order for IV can't be changed in REG_AESCNT and always default to reversed
if(mode & AES_INPUT_NORMAL)
{
REG_AESCTR[0] = iv32[3];
@ -109,7 +109,7 @@ static void aes_advctr(void *ctr, u32 val, u32 mode)
int i;
if(mode & AES_INPUT_BE)
{
for(i = 0; i < 4; ++i) // Endian swap
for(i = 0; i < 4; ++i) //Endian swap
BSWAP32(ctr32[i]);
}
@ -124,7 +124,7 @@ static void aes_advctr(void *ctr, u32 val, u32 mode)
if(mode & AES_INPUT_BE)
{
for(i = 0; i < 4; ++i) // Endian swap
for(i = 0; i < 4; ++i) //Endian swap
BSWAP32(ctr32[i]);
}
}
@ -164,7 +164,7 @@ static void aes_batch(void *dst, const void *src, u32 blockCount)
while(rbc)
{
if(wbc && ((*REG_AESCNT & 0x1F) <= 0xC)) // There's space for at least 4 ints
if(wbc && ((*REG_AESCNT & 0x1F) <= 0xC)) //There's space for at least 4 ints
{
*REG_AESWRFIFO = *src32++;
*REG_AESWRFIFO = *src32++;
@ -173,7 +173,7 @@ static void aes_batch(void *dst, const void *src, u32 blockCount)
wbc--;
}
if(rbc && ((*REG_AESCNT & (0x1F << 0x5)) >= (0x4 << 0x5))) // At least 4 ints available for read
if(rbc && ((*REG_AESCNT & (0x1F << 0x5)) >= (0x4 << 0x5))) //At least 4 ints available for read
{
*dst32++ = *REG_AESRDFIFO;
*dst32++ = *REG_AESRDFIFO;
@ -200,24 +200,24 @@ static void aes(void *dst, const void *src, u32 blockCount, void *iv, u32 mode,
blocks = (blockCount >= 0xFFFF) ? 0xFFFF : blockCount;
// Save the last block for the next decryption CBC batch's iv
//Save the last block for the next decryption CBC batch's iv
if((mode & AES_ALL_MODES) == AES_CBC_DECRYPT_MODE)
{
memcpy(iv, src + (blocks - 1) * AES_BLOCK_SIZE, AES_BLOCK_SIZE);
aes_change_ctrmode(iv, AES_INPUT_BE | AES_INPUT_NORMAL, ivMode);
}
// Process the current batch
//Process the current batch
aes_batch(dst, src, blocks);
// Save the last block for the next encryption CBC batch's iv
//Save the last block for the next encryption CBC batch's iv
if((mode & AES_ALL_MODES) == AES_CBC_ENCRYPT_MODE)
{
memcpy(iv, dst + (blocks - 1) * AES_BLOCK_SIZE, AES_BLOCK_SIZE);
aes_change_ctrmode(iv, AES_INPUT_BE | AES_INPUT_NORMAL, ivMode);
}
// Advance counter for CTR mode
//Advance counter for CTR mode
else if((mode & AES_ALL_MODES) == AES_CTR_MODE)
aes_advctr(iv, blocks, ivMode);

8
source/fatfs/sdmmc/sdmmc.c
View File

@ -63,11 +63,13 @@ static inline void setckl(u32 data)
sdmmc_mask16(REG_SDCLKCTL, 0x0, 0x100);
}
/*
mmcdevice *getMMCDevice(int drive)
{
if(drive == 0) return &handleNAND;
return &handleSD;
}
*/
static int geterror(struct mmcdevice *ctx)
{
@ -470,8 +472,10 @@ void sdmmc_get_cid(bool isNand, u32 *info)
sdmmc_send_command(device, 0x10507, device->initarg << 0x10);
}
bool sdmmc_sdcard_init()
bool sdmmc_sdcard_init(bool isOtpless)
{
InitSD();
return (Nand_Init() | SD_Init()) == 0;
int nand_ret = Nand_Init();
if(isOtpless) return true;
return (nand_ret | SD_Init()) == 0;
}

4
source/fatfs/sdmmc/sdmmc.h
View File

@ -91,10 +91,10 @@ typedef struct mmcdevice {
u32 res;
} mmcdevice;
bool sdmmc_sdcard_init();
bool sdmmc_sdcard_init(bool isOtpless);
int sdmmc_sdcard_readsectors(u32 sector_no, u32 numsectors, u8 *out);
int sdmmc_sdcard_writesectors(u32 sector_no, u32 numsectors, const u8 *in);
int sdmmc_nand_readsectors(u32 sector_no, u32 numsectors, u8 *out);
int sdmmc_nand_writesectors(u32 sector_no, u32 numsectors, const u8 *in);
void sdmmc_get_cid(bool isNand, u32 *info);
mmcdevice *getMMCDevice(int drive);
//mmcdevice *getMMCDevice(int drive);

2
source/installer.c
View File

@ -53,7 +53,7 @@ void main(void)
drawString(TITLE, 10, 10, COLOR_TITLE);
posY = drawString("Thanks to delebile, #cakey and StandardBus", 10, 40, COLOR_WHITE);
if(!sdmmc_sdcard_init() && !isOtpless)
if(!sdmmc_sdcard_init(isOtpless))
shutdown(1, "Error: failed to initialize SD and NAND");
u32 pressed;

2
source/screen.c
View File

@ -38,7 +38,7 @@
#include "cache.h"
#include "i2c.h"
vu32 *const arm11Entry = (vu32 *)BRAHMA_ARM11_ENTRY;
vu32 *arm11Entry = (vu32 *)BRAHMA_ARM11_ENTRY;
static void invokeArm11Function(void (*func)())
{