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https://github.com/AuroraWright/SafeA9LHInstaller.git
synced 2025-06-26 21:52:47 +00:00
Remove unneeded stuff
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aaed6387b5
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@ -1,9 +1,3 @@
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/*
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* types.h
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* by Reisyukaku
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* Copyright (c) 2015 All Rights Reserved
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*/
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#pragma once
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#pragma once
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#include <stdint.h>
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#include <stdint.h>
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@ -35,7 +35,7 @@ static inline void ownArm11(void)
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*(vu32 *)0x1FFAED80 = 0xE51FF004;
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*(vu32 *)0x1FFAED80 = 0xE51FF004;
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*(vu32 *)0x1FFAED84 = A11_PAYLOAD_LOC;
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*(vu32 *)0x1FFAED84 = A11_PAYLOAD_LOC;
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*(vu8 *)0x1FFFFFF0 = 2;
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*(vu8 *)0x1FFFFFF0 = 2;
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while(*(vu32 *)A11_ENTRYPOINT);
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while(*(vu32 *)A11_ENTRYPOINT != 0);
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}
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}
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void main(void)
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void main(void)
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@ -61,7 +61,7 @@ bool fileWrite(const void *buffer, const char *path, u32 size)
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f_truncate(&file);
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f_truncate(&file);
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f_close(&file);
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f_close(&file);
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return true;
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return (u32)written == size;
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}
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}
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if(result == FR_NO_PATH)
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if(result == FR_NO_PATH)
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@ -138,11 +138,11 @@ static inline void installer(bool isA9lh, bool isOtpless)
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if(isA9lh && !isOtpless)
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if(isA9lh && !isOtpless)
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{
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{
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u32 i;
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u32 i;
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for(i = 0; i < 3; i++)
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for(i = 1; i < 3; i++)
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if(memcmp(keySector + AES_BLOCK_SIZE, key2s[i], AES_BLOCK_SIZE) == 0) break;
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if(memcmp(keySector + AES_BLOCK_SIZE, key2s[i], AES_BLOCK_SIZE) == 0) break;
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if(i == 4) shutdown(1, "Error: the OTP hash or the NAND key sector\nare invalid");
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if(i == 3) shutdown(1, "Error: the OTP hash or the NAND key sector\nare invalid");
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if(i == 0) updateA9lh = true;
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if(i == 1) updateA9lh = true;
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}
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}
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if(!isA9lh || updateA9lh || isOtpless) generateSector(keySector, (!isA9lh && isN3DS) ? 1 : 0);
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if(!isA9lh || updateA9lh || isOtpless) generateSector(keySector, (!isA9lh && isN3DS) ? 1 : 0);
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@ -51,13 +51,15 @@ void clearScreens(void)
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void __attribute__((naked)) ARM11(void)
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void __attribute__((naked)) ARM11(void)
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{
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{
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//Setting up two simultaneous memory fills using the GPU
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//Setting up two simultaneous memory fills using the GPU
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vu32 *REGs_PSC0 = (vu32 *)0x10400010;
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vu32 *REGs_PSC0 = (vu32 *)0x10400010,
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*REGs_PSC1 = (vu32 *)0x10400020;
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REGs_PSC0[0] = (u32)fb->top_left >> 3; //Start address
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REGs_PSC0[0] = (u32)fb->top_left >> 3; //Start address
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REGs_PSC0[1] = (u32)(fb->top_left + SCREEN_TOP_FBSIZE) >> 3; //End address
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REGs_PSC0[1] = (u32)(fb->top_left + SCREEN_TOP_FBSIZE) >> 3; //End address
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REGs_PSC0[2] = 0; //Fill value
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REGs_PSC0[2] = 0; //Fill value
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REGs_PSC0[3] = (2 << 8) | 1; //32-bit pattern; start
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REGs_PSC0[3] = (2 << 8) | 1; //32-bit pattern; start
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vu32 *REGs_PSC1 = (vu32 *)0x10400020;
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REGs_PSC1[0] = (u32)fb->bottom >> 3; //Start address
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REGs_PSC1[0] = (u32)fb->bottom >> 3; //Start address
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REGs_PSC1[1] = (u32)(fb->bottom + SCREEN_BOTTOM_FBSIZE) >> 3; //End address
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REGs_PSC1[1] = (u32)(fb->bottom + SCREEN_BOTTOM_FBSIZE) >> 3; //End address
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REGs_PSC1[2] = 0; //Fill value
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REGs_PSC1[2] = 0; //Fill value
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@ -65,16 +67,6 @@ void clearScreens(void)
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while(!((REGs_PSC0[3] & 2) && (REGs_PSC1[3] & 2)));
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while(!((REGs_PSC0[3] & 2) && (REGs_PSC1[3] & 2)));
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if(fb->top_right != fb->top_left)
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{
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REGs_PSC0[0] = (u32)fb->top_right >> 3; //Start address
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REGs_PSC0[1] = (u32)(fb->top_right + SCREEN_TOP_FBSIZE) >> 3; //End address
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REGs_PSC0[2] = 0; //Fill value
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REGs_PSC0[3] = (2 << 8) | 1; //32-bit pattern; start
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while(!(REGs_PSC0[3] & 2));
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}
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WAIT_FOR_ARM9();
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WAIT_FOR_ARM9();
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}
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}
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@ -83,7 +75,7 @@ void clearScreens(void)
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void initScreens(void)
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void initScreens(void)
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{
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{
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void __attribute__((naked)) ARM11(void)
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void __attribute__((naked)) initSequence(void)
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{
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{
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//Disable interrupts
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//Disable interrupts
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__asm(".word 0xF10C01C0");
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__asm(".word 0xF10C01C0");
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@ -189,7 +181,7 @@ void initScreens(void)
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if(PDN_GPU_CNT == 1)
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if(PDN_GPU_CNT == 1)
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{
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{
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invokeArm11Function(ARM11);
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invokeArm11Function(initSequence);
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//Turn on backlight
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//Turn on backlight
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i2cWriteRegister(I2C_DEV_MCU, 0x22, 0x2A);
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i2cWriteRegister(I2C_DEV_MCU, 0x22, 0x2A);
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@ -37,7 +37,7 @@ u32 waitInput(void)
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void mcuReboot(void)
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void mcuReboot(void)
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{
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{
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if(PDN_GPU_CNT != 1) clearScreens();
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clearScreens();
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//Ensure that all memory transfers have completed and that the data cache has been flushed
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//Ensure that all memory transfers have completed and that the data cache has been flushed
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flushEntireDCache();
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flushEntireDCache();
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@ -48,14 +48,14 @@ void mcuReboot(void)
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void shutdown(u32 mode, const char *message)
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void shutdown(u32 mode, const char *message)
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{
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{
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if(mode)
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if(mode != 0)
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{
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{
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posY = drawString(message, 10, posY + SPACING_Y, mode == 1 ? COLOR_RED : COLOR_GREEN);
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posY = drawString(message, 10, posY + SPACING_Y, mode == 1 ? COLOR_RED : COLOR_GREEN);
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drawString("Press any button to shutdown", 10, posY, COLOR_WHITE);
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drawString("Press any button to shutdown", 10, posY, COLOR_WHITE);
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waitInput();
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waitInput();
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}
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}
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if(PDN_GPU_CNT != 1) clearScreens();
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clearScreens();
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//Ensure that all memory transfers have completed and that the data cache has been flushed
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//Ensure that all memory transfers have completed and that the data cache has been flushed
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flushEntireDCache();
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flushEntireDCache();
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