From 8a7448995fe05ad9c92182fb6bb74800849657c5 Mon Sep 17 00:00:00 2001 From: Wolfvak Date: Sun, 26 Jul 2020 10:27:48 -0300 Subject: [PATCH] fixed overlooked ARM9 exception handler issue where code would be dumped incorrectly, modified ARM11 exception vectors to not take an entire page of compiled code --- arm11/link.ld | 9 --- arm11/source/arm/{exception.c => xrq.c} | 2 + arm11/source/arm/xrq.h | 21 ++++++ arm11/source/arm/{vectors.s => xrqVectors.s} | 77 +++++++++++--------- arm11/source/system/sections.h | 1 - arm11/source/system/sys.c | 6 +- arm9/source/system/xrq.c | 5 +- 7 files changed, 70 insertions(+), 51 deletions(-) rename arm11/source/arm/{exception.c => xrq.c} (97%) create mode 100644 arm11/source/arm/xrq.h rename arm11/source/arm/{vectors.s => xrqVectors.s} (72%) diff --git a/arm11/link.ld b/arm11/link.ld index 9315821..3664242 100644 --- a/arm11/link.ld +++ b/arm11/link.ld @@ -10,15 +10,6 @@ MEMORY SECTIONS { - .vector : ALIGN(4K) - { - __vector_pa = LOADADDR(.vector); - __vector_va = ABSOLUTE(.); - KEEP(*(.vector)) - . = ALIGN(4K); - __vector_len = . - __vector_va; - } >HIGHRAM AT>AXIWRAM - .text : ALIGN(4K) { __text_pa = LOADADDR(.text); diff --git a/arm11/source/arm/exception.c b/arm11/source/arm/xrq.c similarity index 97% rename from arm11/source/arm/exception.c rename to arm11/source/arm/xrq.c index a2c99b4..221b526 100644 --- a/arm11/source/arm/exception.c +++ b/arm11/source/arm/xrq.c @@ -16,6 +16,8 @@ * along with this program. If not, see . */ +// kinda hardcoded and all over the place, but it needs to stay simple + #include #include diff --git a/arm11/source/arm/xrq.h b/arm11/source/arm/xrq.h new file mode 100644 index 0000000..fd40ae4 --- /dev/null +++ b/arm11/source/arm/xrq.h @@ -0,0 +1,21 @@ +/* + * This file is part of GodMode9 + * Copyright (C) 2020 Wolfvak + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#pragma once + +u32 xrqInstallVectorTable(void); diff --git a/arm11/source/arm/vectors.s b/arm11/source/arm/xrqVectors.s similarity index 72% rename from arm11/source/arm/vectors.s rename to arm11/source/arm/xrqVectors.s index a04a867..03d8267 100644 --- a/arm11/source/arm/vectors.s +++ b/arm11/source/arm/xrqVectors.s @@ -28,47 +28,46 @@ .macro TRAP_ENTRY xrq msr cpsr_f, #(\xrq << 29) - b XRQ_Main + b xrqMain .endm -.section .vector, "ax" -vectors: - b XRQ_Reset - b XRQ_Undefined - b XRQ_SVC - b XRQ_PrefetchAbt - b XRQ_DataAbt - b XRQ_Reserved - b XRQ_IRQ - b XRQ_FIQ +xrqVectorTable: + ldr pc, =xrqReset + ldr pc, =xrqUndefined + ldr pc, =xrqSVC + ldr pc, =xrqPrefetchAbort + ldr pc, =xrqDataAbort + b . @ ignore the reserved exception + ldr pc, =xrqIRQ + ldr pc, =xrqFIQ +.pool +xrqVectorTableEnd: -XRQ_Reset: +xrqReset: TRAP_ENTRY 0 -XRQ_Undefined: +xrqUndefined: TRAP_ENTRY 1 -XRQ_SVC: +xrqSVC: TRAP_ENTRY 2 -XRQ_PrefetchAbt: +xrqPrefetchAbort: TRAP_ENTRY 3 -XRQ_DataAbt: +xrqDataAbort: TRAP_ENTRY 4 -XRQ_Reserved: - TRAP_ENTRY 5 - -XRQ_FIQ: +xrqFIQ: TRAP_ENTRY 7 -XRQ_Main: - ldr sp, =(exception_stack_top - 32*4) - stmia sp, {r0-r7} - +xrqMain: + clrex cpsid aif + ldr sp, =(xrqStackTop - 32*4) + stmia sp, {r0-r7} + mrs r1, cpsr lsr r0, r1, #29 @@ -82,11 +81,7 @@ XRQ_Main: add r3, sp, #8*4 msr cpsr_c, r2 - nop - nop stmia r3!, {r8-r14} - nop - nop msr cpsr_c, r1 mrc p15, 0, r4, c5, c0, 0 @ data fault status register @@ -99,7 +94,8 @@ XRQ_Main: bl do_exception -XRQ_IRQ: +xrqIRQ: + clrex sub lr, lr, #4 @ Fix return address srsfd sp!, #SR_SVC_MODE @ Store IRQ mode LR and SPSR on the SVC stack cps #SR_SVC_MODE @ Switch to SVC mode @@ -108,17 +104,26 @@ XRQ_IRQ: and r4, sp, #7 @ Fix SP to be 8byte aligned sub sp, sp, r4 - mov lr, pc - ldr pc, =gicTopHandler + bl gicTopHandler add sp, sp, r4 pop {r0-r4, r12, lr} rfeia sp! @ Return from exception -.section .bss.xrq_stk +@ u32 xrqInstallVectorTable(void) +.global xrqInstallVectorTable +.type xrqInstallVectorTable, %function +xrqInstallVectorTable: + ldr r0, =xrqPage + ldr r1, =xrqVectorTable + mov r2, #(xrqVectorTableEnd - xrqVectorTable) + b memcpy + +.section .bss.xrqPage .align 12 -exception_stack: @ reserve a single aligned page for the exception stack - .space 4096 -exception_stack_top: -.global exception_stack_top +.global xrqPage +xrqPage: + .space 8192 @ reserve two 4K aligned pages for vectors and abort stack +.global xrqStackTop +xrqStackTop: diff --git a/arm11/source/system/sections.h b/arm11/source/system/sections.h index 46fb862..008f93a 100755 --- a/arm11/source/system/sections.h +++ b/arm11/source/system/sections.h @@ -21,7 +21,6 @@ #include #define DEF_SECT_(n) extern u32 __##n##_pa, __##n##_va, __##n##_len; -DEF_SECT_(vector) DEF_SECT_(text) DEF_SECT_(data) DEF_SECT_(rodata) diff --git a/arm11/source/system/sys.c b/arm11/source/system/sys.c index 77b83f2..6bccc64 100755 --- a/arm11/source/system/sys.c +++ b/arm11/source/system/sys.c @@ -24,7 +24,7 @@ #include "arm/gic.h" #include "arm/mmu.h" #include "arm/scu.h" -#include "arm/timer.h" +#include "arm/xrq.h" #include "hw/codec.h" #include "hw/gpulcd.h" @@ -79,13 +79,15 @@ void SYS_CoreZeroInit(void) SCU_Init(); // Map all sections here - mmuMapArea(SECTION_TRI(vector), MMU_FLAGS(MMU_CACHE_WT, MMU_READ_ONLY, 0, 0)); mmuMapArea(SECTION_TRI(text), MMU_FLAGS(MMU_CACHE_WT, MMU_READ_ONLY, 0, 1)); mmuMapArea(SECTION_TRI(data), MMU_FLAGS(MMU_CACHE_WBA, MMU_READ_WRITE, 1, 1)); mmuMapArea(SECTION_TRI(rodata), MMU_FLAGS(MMU_CACHE_WT, MMU_READ_ONLY, 1, 1)); mmuMapArea(SECTION_TRI(bss), MMU_FLAGS(MMU_CACHE_WBA, MMU_READ_WRITE, 1, 1)); mmuMapArea(SECTION_TRI(shared), MMU_FLAGS(MMU_STRONG_ORDER, MMU_READ_WRITE, 1, 1)); + // High exception vectors + mmuMapArea(0xFFFF0000, xrqInstallVectorTable(), 4UL << 10, MMU_FLAGS(MMU_CACHE_WT, MMU_READ_ONLY, 0, 0)); + // BootROM mmuMapArea(0x00010000, 0x00010000, 32UL << 10, MMU_FLAGS(MMU_CACHE_WT, MMU_READ_ONLY, 0, 1)); diff --git a/arm9/source/system/xrq.c b/arm9/source/system/xrq.c index f224be0..aa36af2 100644 --- a/arm9/source/system/xrq.c +++ b/arm9/source/system/xrq.c @@ -108,11 +108,10 @@ void XRQ_DumpRegisters(u32 xrq, u32 *regs) pc = regs[15] & ~0xF; if (pc_dumpable(pc, &pc_lower, &pc_upper)) { wstr += sprintf(wstr, "Code:\n"); - wstr += XRQ_DumpData_u32(wstr, pc_lower, pc_upper); if (regs[16] & SR_THUMB) { // need to take Thumb code into account - wstr += XRQ_DumpData_u16(wstr, pc-PC_DUMPRAD, pc+PC_DUMPRAD); + wstr += XRQ_DumpData_u16(wstr, pc_lower, pc_upper); } else { - wstr += XRQ_DumpData_u32(wstr, pc-PC_DUMPRAD, pc+PC_DUMPRAD); + wstr += XRQ_DumpData_u32(wstr, pc_lower, pc_upper); } }