mirror of
https://github.com/d0k3/SafeB9SInstaller.git
synced 2025-06-25 21:22:45 +00:00
Merged linker & start.s files thanks to @Wolfvak
This commit is contained in:
d0k3
parent
65734816f2
commit
abc524e5db
47
Makefile
47
Makefile
@ -18,7 +18,7 @@ include $(DEVKITARM)/ds_rules
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#---------------------------------------------------------------------------------
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export TARGET := SafeSigHaxInstaller
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BUILD := build
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SOURCES := source source/common source/fs source/crypto source/fatfs source/nand source/safety source/abstraction
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SOURCES := source source/common source/fs source/crypto source/fatfs source/nand source/safety
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DATA := data
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INCLUDES := source source/common source/font source/fs source/crypto source/fatfs source/nand source/safety
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@ -27,9 +27,8 @@ INCLUDES := source source/common source/font source/fs source/crypto source/fatf
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#---------------------------------------------------------------------------------
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ARCH := -mthumb -mthumb-interwork -flto
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CFLAGS := -g -Wall -Wextra -Wpedantic -Wcast-align -pedantic -O2\
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-march=armv5te -mtune=arm946e-s -fomit-frame-pointer\
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-ffast-math -std=c99\
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CFLAGS := -g -Wall -Wextra -Wpedantic -Wcast-align -Wno-main -O2\
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-march=armv5te -mtune=arm946e-s -fomit-frame-pointer -ffast-math -std=gnu99\
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$(ARCH)
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CFLAGS += $(INCLUDE) -DEXEC_$(EXEC_METHOD) -DARM9
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@ -51,13 +50,7 @@ endif
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CXXFLAGS := $(CFLAGS) -fno-rtti -fno-exceptions
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ASFLAGS := -g $(ARCH) -DEXEC_$(EXEC_METHOD)
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LDFLAGS = -nostartfiles -g $(ARCH) -Wl,-Map,$(TARGET).map
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ifeq ($(EXEC_METHOD),GATEWAY)
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LDFLAGS += --specs=../gateway.specs
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else ifeq ($(EXEC_METHOD),A9LH)
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LDFLAGS += --specs=../a9lh.specs
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endif
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LDFLAGS = -T../link.ld -nostartfiles -g $(ARCH) -Wl,-Map,$(TARGET).map
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LIBS :=
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@ -111,36 +104,34 @@ export INCLUDE := $(foreach dir,$(INCLUDES),-I$(CURDIR)/$(dir)) \
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export LIBPATHS := $(foreach dir,$(LIBDIRS),-L$(dir)/lib)
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.PHONY: common clean all gateway a9lh cakehax cakerop brahma release
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.PHONY: common clean all gateway binary cakehax cakerop brahma release
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#---------------------------------------------------------------------------------
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all: a9lh
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all: binary
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common:
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@[ -d $(OUTPUT_D) ] || mkdir -p $(OUTPUT_D)
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@[ -d $(BUILD) ] || mkdir -p $(BUILD)
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submodules:
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@-git submodule update --init --recursive
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gateway: common
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@make --no-print-directory -C $(BUILD) -f $(CURDIR)/Makefile EXEC_METHOD=GATEWAY
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binary: common
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@make --no-print-directory -C $(BUILD) -f $(CURDIR)/Makefile
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gateway: binary
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@cp resources/LauncherTemplate.dat $(OUTPUT_D)/Launcher.dat
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@dd if=$(OUTPUT).bin of=$(OUTPUT_D)/Launcher.dat bs=1497296 seek=1 conv=notrunc
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a9lh: common
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@make --no-print-directory -C $(BUILD) -f $(CURDIR)/Makefile EXEC_METHOD=A9LH
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cakehax: submodules common
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@make --no-print-directory -C $(BUILD) -f $(CURDIR)/Makefile EXEC_METHOD=GATEWAY
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cakehax: submodules binary
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@make dir_out=$(OUTPUT_D) name=$(TARGET).dat -C CakeHax bigpayload
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@dd if=$(OUTPUT).bin of=$(OUTPUT).dat bs=512 seek=160
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cakerop: cakehax
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@make DATNAME=$(TARGET).dat DISPNAME=$(TARGET) GRAPHICS=../resources/CakesROP -C CakesROP
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@mv CakesROP/CakesROP.nds $(OUTPUT_D)/$(TARGET).nds
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brahma: submodules a9lh
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brahma: submodules binary
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@[ -d BrahmaLoader/data ] || mkdir -p BrahmaLoader/data
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@cp $(OUTPUT).bin BrahmaLoader/data/payload.bin
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@cp resources/BrahmaAppInfo BrahmaLoader/resources/AppInfo
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@ -148,22 +139,22 @@ brahma: submodules a9lh
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@make --no-print-directory -C BrahmaLoader APP_TITLE=$(TARGET)
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@mv BrahmaLoader/output/*.3dsx $(OUTPUT_D)
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@mv BrahmaLoader/output/*.smdh $(OUTPUT_D)
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release:
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@rm -fr $(BUILD) $(OUTPUT_D) $(RELEASE)
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@make --no-print-directory binary
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@-make --no-print-directory cakerop
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@rm -fr $(BUILD) $(OUTPUT).bin $(OUTPUT).elf $(CURDIR)/$(LOADER)/data
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@make --no-print-directory brahma
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@-make --no-print-directory brahma
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@[ -d $(RELEASE) ] || mkdir -p $(RELEASE)
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@[ -d $(RELEASE)/$(TARGET) ] || mkdir -p $(RELEASE)/$(TARGET)
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@-cp $(OUTPUT).bin $(RELEASE)
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@cp $(OUTPUT).bin $(RELEASE)
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@-cp $(OUTPUT).dat $(RELEASE)
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@-cp $(OUTPUT).nds $(RELEASE)
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@-cp $(OUTPUT).3dsx $(RELEASE)/$(TARGET)
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@-cp $(OUTPUT).smdh $(RELEASE)/$(TARGET)
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@cp $(CURDIR)/README.md $(RELEASE)
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@-7z a $(RELEASE)/$(TARGET)-`date +'%Y%m%d-%H%M%S'`.zip $(RELEASE)/*
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#---------------------------------------------------------------------------------
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clean:
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@echo clean CakeHax...
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13
a9lh.ld
13
a9lh.ld
@ -1,13 +0,0 @@
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ENTRY(_start)
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SECTIONS
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{
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. = 0x23F00000;
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.text.start : { *(.text.start) }
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.text : { *(.text) }
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.data : { *(.data) }
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.bss : { __bss_start = .; *(.bss COMMON) }
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__bss_end = .;
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.rodata : { *(.rodata) }
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. = ALIGN(4);
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__end__ = ABSOLUTE(.);
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}
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@ -1,5 +0,0 @@
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%rename link old_link
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*link:
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%(old_link) -T ../a9lh.ld%s
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13
gateway.ld
13
gateway.ld
@ -1,13 +0,0 @@
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ENTRY(_start)
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SECTIONS
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{
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. = 0x08000000;
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.text.start : { *(.text.start) }
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.text : { *(.text) }
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.data : { *(.data) }
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.bss : { __bss_start = .; *(.bss COMMON) }
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__bss_end = .;
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.rodata : { *(.rodata) }
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. = ALIGN(4);
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__end__ = ABSOLUTE(.);
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}
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@ -1,5 +0,0 @@
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%rename link old_link
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*link:
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%(old_link) -T ../gateway.ld%s
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18
link.ld
Normal file
18
link.ld
Normal file
@ -0,0 +1,18 @@
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OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
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OUTPUT_ARCH(arm)
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ENTRY(_start)
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SECTIONS
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{
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. = 0x23F00000;
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.text.start : ALIGN(4) { *(.text.start) }
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.text : ALIGN(4) { *(.text*) }
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.rodata : ALIGN(4) { *(.rodata*) }
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.data : ALIGN(4) { *(.data*) }
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.bss : ALIGN(4) { __bss_start = .; *(.bss* COMMON); __bss_end = .;}
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. = ALIGN(4);
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__end__ = ABSOLUTE(.);
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}
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@ -1,85 +0,0 @@
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#ifdef EXEC_A9LH
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.section .text.start
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.align 4
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.global _start
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_start:
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@ Change the stack pointer
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mov sp, #0x27000000
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@ Disable caches / mpu
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mrc p15, 0, r4, c1, c0, 0 @ read control register
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bic r4, #(1<<12) @ - instruction cache disable
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bic r4, #(1<<2) @ - data cache disable
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bic r4, #(1<<0) @ - mpu disable
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mcr p15, 0, r4, c1, c0, 0 @ write control register
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@ Clear bss
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ldr r0, =__bss_start
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ldr r1, =__bss_end
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mov r2, #0
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.bss_clr:
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cmp r0, r1
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beq .bss_clr_done
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str r2, [r0], #4
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b .bss_clr
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.bss_clr_done:
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@ Give read/write access to all the memory regions
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ldr r5, =0x33333333
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mcr p15, 0, r5, c5, c0, 2 @ write data access
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mcr p15, 0, r5, c5, c0, 3 @ write instruction access
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@ Sets MPU permissions and cache settings
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ldr r0, =0xFFFF001D @ ffff0000 32k | bootrom (unprotected part)
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ldr r1, =0x3000801B @ 30000000 16k | dtcm
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ldr r2, =0x01FF801D @ 01ff8000 32k | itcm
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ldr r3, =0x08000029 @ 08000000 2M | arm9 mem (O3DS / N3DS)
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ldr r4, =0x10000029 @ 10000000 2M | io mem (ARM9 / first 2MB)
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ldr r5, =0x20000037 @ 20000000 256M | fcram (O3DS / N3DS)
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ldr r6, =0x1FF00027 @ 1FF00000 1M | dsp / axi wram
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ldr r7, =0x1800002D @ 18000000 8M | vram (+ 2MB)
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mov r8, #0x2D
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mcr p15, 0, r0, c6, c0, 0
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mcr p15, 0, r1, c6, c1, 0
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mcr p15, 0, r2, c6, c2, 0
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mcr p15, 0, r3, c6, c3, 0
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mcr p15, 0, r4, c6, c4, 0
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mcr p15, 0, r5, c6, c5, 0
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mcr p15, 0, r6, c6, c6, 0
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mcr p15, 0, r7, c6, c7, 0
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mcr p15, 0, r8, c3, c0, 0 @ Write bufferable 0, 2, 5
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mcr p15, 0, r8, c2, c0, 0 @ Data cacheable 0, 2, 5
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mcr p15, 0, r8, c2, c0, 1 @ Inst cacheable 0, 2, 5
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@ Enable dctm
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ldr r1, =0x3000800A @ set dtcm
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mcr p15, 0, r1, c9, c1, 0 @ set the dtcm Region Register
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@ Enable caches
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mrc p15, 0, r4, c1, c0, 0 @ read control register
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orr r4, r4, #(1<<18) @ - itcm enable
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orr r4, r4, #(1<<16) @ - dtcm enable
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orr r4, r4, #(1<<12) @ - instruction cache enable
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orr r4, r4, #(1<<2) @ - data cache enable
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orr r4, r4, #(1<<0) @ - mpu enable
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mcr p15, 0, r4, c1, c0, 0 @ write control register
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@ Flush caches
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mov r5, #0
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mcr p15, 0, r5, c7, c5, 0 @ flush I-cache
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mcr p15, 0, r5, c7, c6, 0 @ flush D-cache
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mcr p15, 0, r5, c7, c10, 4 @ drain write buffer
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@ Fixes mounting of SDMC
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ldr r0, =0x10000020
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mov r1, #0x340
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str r1, [r0]
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bl main
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.die:
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b .die
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#endif // EXEC_A9LH
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@ -37,6 +37,9 @@
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#define align(v,a) \
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(((v) % (a)) ? ((v) + (a) - ((v) % (a))) : (v))
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#define ENTRY_BRAHMA (1)
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#define ENTRY_GATEWAY (2)
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// SafeSigHaxInstaller version
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#define VERSION "0.0.3"
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@ -215,23 +215,25 @@ bool ShowPrompt(bool ask, const char *format, ...)
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}
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bool ShowUnlockSequence(u32 seqlvl, const char *format, ...) {
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const int seqcolors[6] = { COLOR_STD_FONT, COLOR_BRIGHTGREEN, COLOR_BRIGHTYELLOW,
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COLOR_RED, COLOR_BRIGHTBLUE, COLOR_DARKRED };
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const u32 sequences[6][5] = {
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const int seqcolors[7] = { COLOR_STD_FONT, COLOR_BRIGHTGREEN, COLOR_BRIGHTYELLOW,
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COLOR_ORANGE, COLOR_BRIGHTBLUE, COLOR_RED, COLOR_DARKRED };
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const u32 sequences[7][5] = {
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{ BUTTON_RIGHT, BUTTON_DOWN, BUTTON_RIGHT, BUTTON_DOWN, BUTTON_A },
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{ BUTTON_LEFT, BUTTON_DOWN, BUTTON_RIGHT, BUTTON_UP, BUTTON_A },
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{ BUTTON_LEFT, BUTTON_RIGHT, BUTTON_DOWN, BUTTON_UP, BUTTON_A },
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{ BUTTON_LEFT, BUTTON_UP, BUTTON_RIGHT, BUTTON_UP, BUTTON_A },
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{ BUTTON_RIGHT, BUTTON_DOWN, BUTTON_LEFT, BUTTON_DOWN, BUTTON_A },
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{ BUTTON_DOWN, BUTTON_LEFT, BUTTON_UP, BUTTON_LEFT, BUTTON_A }
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{ BUTTON_DOWN, BUTTON_LEFT, BUTTON_UP, BUTTON_LEFT, BUTTON_A },
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{ BUTTON_UP, BUTTON_DOWN, BUTTON_LEFT, BUTTON_RIGHT, BUTTON_A }
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};
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const char seqsymbols[6][5] = {
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const char seqsymbols[7][5] = {
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{ '\x1A', '\x19', '\x1A', '\x19', 'A' },
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{ '\x1B', '\x19', '\x1A', '\x18', 'A' },
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{ '\x1B', '\x1A', '\x19', '\x18', 'A' },
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{ '\x1B', '\x18', '\x1A', '\x18', 'A' },
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{ '\x1A', '\x19', '\x1B', '\x19', 'A' },
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{ '\x19', '\x1B', '\x18', '\x1B', 'A' }
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{ '\x19', '\x1B', '\x18', '\x1B', 'A' },
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{ '\x18', '\x19', '\x1B', '\x1A', 'A' }
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};
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const u32 len = 5;
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u32 lvl = 0;
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@ -21,7 +21,7 @@
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#define FONT_HEIGHT_EXT 8
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#endif
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#define RGB(r,g,b) (r<<24|b<<16|g<<8|r)
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#define RGB(r,g,b) ((r)<<24|(b)<<16|(g)<<8|(r))
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#define COLOR_BLACK RGB(0x00, 0x00, 0x00)
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#define COLOR_WHITE RGB(0xFF, 0xFF, 0xFF)
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@ -32,6 +32,7 @@
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#define COLOR_BLUE RGB(0x00, 0x00, 0xFF)
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#define COLOR_YELLOW RGB(0xFF, 0xFF, 0x00)
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#define COLOR_CYAN RGB(0xFF, 0x00, 0xFF)
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#define COLOR_ORANGE RGB(0xFF, 0xA5, 0x00)
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#define COLOR_BRIGHTRED RGB(0xFF, 0x30, 0x30)
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#define COLOR_DARKRED RGB(0x80, 0x00, 0x00)
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@ -51,15 +52,8 @@
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#define COLOR_STD_BG COLOR_BLACK
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#define COLOR_STD_FONT COLOR_WHITE
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#ifdef EXEC_GATEWAY
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#define TOP_SCREEN (u8*)(*(u32*)((uint32_t)0x080FFFC0 + 4 * (*(u32*)0x080FFFD8 & 1)))
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#define BOT_SCREEN (u8*)(*(u32*)((uint32_t)0x080FFFD0 + 4 * (*(u32*)0x080FFFDC & 1)))
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#elif defined(EXEC_A9LH)
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#define TOP_SCREEN (u8*)(*(u32*)0x23FFFE00)
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#define BOT_SCREEN (u8*)(*(u32*)0x23FFFE08)
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#else
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#error "Unknown execution method"
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#endif
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#define TOP_SCREEN (u8*)(*(u32*)0x23FFFE00)
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#define BOT_SCREEN (u8*)(*(u32*)0x23FFFE08)
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void ClearScreen(unsigned char *screen, int color);
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void ClearScreenF(bool clear_top, bool clear_bottom, int color);
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@ -1,68 +1,103 @@
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#ifdef EXEC_GATEWAY
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.section .text.start
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.global _start
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.align 4
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.arm
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_vectors:
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ldr pc, =InfiniteLoop
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.pool
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ldr pc, =InfiniteLoop
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.pool
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ldr pc, =InfiniteLoop
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.pool
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ldr pc, =InfiniteLoop
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.pool
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ldr pc, =InfiniteLoop
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.pool
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ldr pc, =InfiniteLoop
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.pool
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@ if the binary is booted from Brahma/CakeHax/k9lh
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@ the entrypoint is <start + 0x0>
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@ framebuffers are already set
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_start:
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ldr sp,=0x22140000
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop @ dummy
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b _skip_gw
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@ if the binary is booted from the GW exploit
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@ the entrypoint is <start + 0x30>
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_start_gw:
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@@wait for the arm11 kernel threads to be ready
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ldr r1, =0x10000
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mov r1, #0x10000
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waitLoop9:
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sub r1, #1
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cmp r1, #0
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bgt waitLoop9
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ldr r1, =0x10000
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mov r1, #0x10000
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waitLoop92:
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sub r1, #1
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cmp r1, #0
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bgt waitLoop92
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@ copy the payload to the standard entrypoint (0x23F00000)
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adr r0, _start
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add r1, r0, #0x100000
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ldr r2, .entry
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.copy_binary_fcram:
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cmp r0, r1
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ldrlt r3, [r0], #4
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strlt r3, [r2], #4
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blt .copy_binary_fcram
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@ setup framebuffers to look like Brahma/etc
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ldr r0, .gw_fba
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ldr r1, [r0, #0x18]
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||||
and r1, #1
|
||||
ldr r1, [r0, r1, lsl #2] @ r1 := top framebuffer loc
|
||||
mov r2, r1 @ r2 := top framebuffer loc
|
||||
|
||||
ldr r0, .gw_fbb
|
||||
ldr r3, [r0, #0xC]
|
||||
and r3, #1
|
||||
ldr r3, [r0, r3, lsl #2] @ r3 := bottom framebuffer loc
|
||||
|
||||
ldr r0, .cakehax
|
||||
stmia r0, {r1,r2,r3}
|
||||
@ framebuffers properly set
|
||||
|
||||
ldr r3, .entry
|
||||
bx r3
|
||||
|
||||
.gw_fba: .word 0x080FFFC0
|
||||
.gw_fbb: .word 0x080FFFD0
|
||||
.cakehax: .word 0x23FFFE00
|
||||
.entry: .word 0x23F00000
|
||||
|
||||
_skip_gw:
|
||||
@ Disable caches / mpu
|
||||
mrc p15, 0, r4, c1, c0, 0 @ read control register
|
||||
bic r4, #(1<<12) @ - instruction cache disable
|
||||
bic r4, #(1<<2) @ - data cache disable
|
||||
bic r4, #(1<<0) @ - mpu disable
|
||||
mcr p15, 0, r4, c1, c0, 0 @ write control register
|
||||
|
||||
|
||||
@ Clear bss
|
||||
ldr r0, =__bss_start
|
||||
ldr r1, =__bss_end
|
||||
ldr r1, =__end__
|
||||
mov r2, #0
|
||||
|
||||
.bss_clr:
|
||||
cmp r0, r1
|
||||
beq .bss_clr_done
|
||||
str r2, [r0], #4
|
||||
b .bss_clr
|
||||
.bss_clr_done:
|
||||
|
||||
cmp r0, r1
|
||||
strlt r2, [r0], #4
|
||||
blt .bss_clr
|
||||
|
||||
@ Give read/write access to all the memory regions
|
||||
ldr r5, =0x33333333
|
||||
mcr p15, 0, r5, c5, c0, 2 @ write data access
|
||||
mcr p15, 0, r5, c5, c0, 3 @ write instruction access
|
||||
|
||||
@ Sets MPU permissions and cache settings
|
||||
ldr r0, =0xFFFF001D @ ffff0000 32k | bootrom (unprotected part)
|
||||
ldr r0, =0xFFFF001F @ ffff0000 64k | bootrom (unprotected / protected)
|
||||
ldr r1, =0x3000801B @ 30000000 16k | dtcm
|
||||
ldr r2, =0x01FF801D @ 01ff8000 32k | itcm
|
||||
ldr r3, =0x08000029 @ 08000000 2M | arm9 mem (O3DS / N3DS)
|
||||
@ -86,7 +121,7 @@ _start:
|
||||
@ Enable dctm
|
||||
ldr r1, =0x3000800A @ set dtcm
|
||||
mcr p15, 0, r1, c9, c1, 0 @ set the dtcm Region Register
|
||||
|
||||
|
||||
@ Enable caches
|
||||
mrc p15, 0, r4, c1, c0, 0 @ read control register
|
||||
orr r4, r4, #(1<<18) @ - itcm enable
|
||||
@ -107,12 +142,9 @@ _start:
|
||||
mov r1, #0x340
|
||||
str r1, [r0]
|
||||
|
||||
ldr sp, =0x22160000
|
||||
ldr r3, =main
|
||||
blx r3
|
||||
mov sp, #0x27000000
|
||||
|
||||
blx main
|
||||
b _start
|
||||
|
||||
.pool
|
||||
|
||||
InfiniteLoop:
|
||||
b InfiniteLoop
|
||||
|
||||
#endif // EXEC_GATEWAY
|
||||
Loading…
x
Reference in New Issue
Block a user