mirror of
https://github.com/d0k3/GodMode9.git
synced 2025-06-26 05:32:47 +00:00
ad9a9bd5a0
- reset LEDs on boot - add code to set the notification LED - add a PXI command to verify the NVRAM is actually online - notify the ARM9 about the shell state through the HID thing
154 lines
3.0 KiB
C
154 lines
3.0 KiB
C
#include <common.h>
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#include <types.h>
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#include <shmem.h>
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#include <arm.h>
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#include <pxi.h>
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#include "arm/gic.h"
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#include "hw/hid.h"
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#include "hw/gpulcd.h"
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#include "hw/i2c.h"
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#include "hw/mcu.h"
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#include "hw/nvram.h"
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#include "system/sys.h"
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static GlobalSharedMemory SharedMemory_State;
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static const u8 brightness_lvls[] = {
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0x10, 0x17, 0x1E, 0x25,
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0x2C, 0x34, 0x3C, 0x44,
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0x4D, 0x56, 0x60, 0x6B,
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0x79, 0x8C, 0xA7, 0xD2
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};
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static int prev_bright_lvl = -1;
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void VBlank_Handler(u32 __attribute__((unused)) irqn)
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{
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int cur_bright_lvl = (MCU_GetVolumeSlider() >> 2) % countof(brightness_lvls);
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if (cur_bright_lvl != prev_bright_lvl) {
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prev_bright_lvl = cur_bright_lvl;
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LCD_SetBrightness(brightness_lvls[cur_bright_lvl]);
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}
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// the state should probably be stored on its own
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// setion without caching enabled, since it must
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// be readable by the ARM9 at all times anyway
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SharedMemory_State.hid_state = HID_GetState();
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ARM_WbDC_Range(&SharedMemory_State, sizeof(SharedMemory_State));
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ARM_DMB();
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}
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static bool legacy = false;
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void PXI_RX_Handler(u32 __attribute__((unused)) irqn)
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{
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u32 ret, msg, cmd, argc, args[PXI_MAX_ARGS];
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msg = PXI_Recv();
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cmd = msg & 0xFFFF;
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argc = msg >> 16;
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if (argc >= PXI_MAX_ARGS) {
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PXI_Send(0xFFFFFFFF);
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return;
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}
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PXI_RecvArray(args, argc);
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switch (cmd) {
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case PXI_LEGACY_MODE:
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{
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// TODO: If SMP is enabled, an IPI should be sent here (with a DSB)
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legacy = true;
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ret = 0;
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break;
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}
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case PXI_GET_SHMEM:
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{
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ret = (u32)&SharedMemory_State;
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break;
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}
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case PXI_I2C_READ:
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{
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ARM_InvDC_Range((void*)args[2], args[3]);
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ret = I2C_readRegBuf(args[0], args[1], (u8*)args[2], args[3]);
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ARM_WbDC_Range((void*)args[2], args[3]);
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ARM_DMB();
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break;
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}
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case PXI_I2C_WRITE:
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{
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ARM_InvDC_Range((void*)args[2], args[3]);
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ARM_DMB();
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ret = I2C_writeRegBuf(args[0], args[1], (u8*)args[2], args[3]);
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break;
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}
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case PXI_NVRAM_ONLINE:
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{
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ret = (NVRAM_Status() & NVRAM_SR_WIP) == 0;
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break;
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}
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case PXI_NVRAM_READ:
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{
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ARM_InvDC_Range((void*)args[1], args[2]);
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NVRAM_Read(args[0], (u32*)args[1], args[2]);
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ARM_WbDC_Range((void*)args[1], args[2]);
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ARM_DMB();
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ret = 0;
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break;
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}
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case PXI_NOTIFY_LED:
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{
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MCU_SetNotificationLED(args[0], args[1]);
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ret = 0;
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break;
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}
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/* New CMD template:
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case CMD_ID:
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{
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<var declarations/assignments>
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<execute the command>
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<set the return value>
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break;
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}
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*/
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default:
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ret = 0xFFFFFFFF;
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break;
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}
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PXI_Send(ret);
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}
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void __attribute__((noreturn)) MainLoop(void)
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{
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// enable PXI RX interrupt
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GIC_Enable(PXI_RX_INTERRUPT, BIT(0), GIC_HIGHEST_PRIO, PXI_RX_Handler);
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// enable MCU interrupts
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GIC_Enable(MCU_INTERRUPT, BIT(0), GIC_HIGHEST_PRIO + 1, MCU_HandleInterrupts);
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GIC_Enable(VBLANK_INTERRUPT, BIT(0), GIC_HIGHEST_PRIO + 2, VBlank_Handler);
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// ARM9 won't try anything funny until this point
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PXI_Barrier(ARM11_READY_BARRIER);
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// Process IRQs until the ARM9 tells us it's time to boot something else
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do {
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ARM_WFI();
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} while(!legacy);
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SYS_CoreZeroShutdown();
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SYS_CoreShutdown();
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}
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