mirror of
https://github.com/d0k3/GodMode9.git
synced 2025-06-26 13:42:47 +00:00
f5a877d00b
- moved brightness control to the ARM11 - moved HID updating to the ARM11 - moved screen init from ARM9 to the ARM11, always performed unconditionally - removed unnecessary SCREENINIT and SET_BRIGHTNESS pxi commands and other stuff I probably forgot about
71 lines
1.2 KiB
ArmAsm
71 lines
1.2 KiB
ArmAsm
.section .text.boot
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.align 4
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#include <arm.h>
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#define STACK_SZ (16384)
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.global __boot
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__boot:
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cpsid aif, #SR_SVC_MODE
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@ Writeback and invalidate all DCache
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@ Invalidate all caches
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@ Data Synchronization Barrier
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mov r0, #0
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mcr p15, 0, r0, c7, c10, 0
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mcr p15, 0, r0, c7, c7, 0
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mcr p15, 0, r0, c7, c10, 4
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@ Reset control registers
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ldr r0, =0x00054078
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ldr r1, =0x0000000F
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ldr r2, =0x00F00000
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mcr p15, 0, r0, c1, c0, 0
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mcr p15, 0, r1, c1, c0, 1
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mcr p15, 0, r2, c1, c0, 2
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@ Get CPU ID
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mrc p15, 0, r12, c0, c0, 5
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ands r12, r12, #3
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@ Setup stack according to CPU ID
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ldr sp, =(_stack_base + STACK_SZ)
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ldr r0, =STACK_SZ
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mla sp, r0, r12, sp
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beq corezero_start
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cmp r12, #MAX_CPU
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blo coresmp_start
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1:
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wfi
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b 1b
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corezero_start:
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@ assume __bss_len is 16 byte aligned
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ldr r0, =__bss_pa
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ldr r1, =__bss_len
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mov r2, #0
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mov r3, #0
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mov r4, #0
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mov r5, #0
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add r1, r0, r1
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.Lclearbss:
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cmp r0, r1
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stmltia r0!, {r2-r5}
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blt .Lclearbss
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bl SYS_CoreZeroInit
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coresmp_start:
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bl SYS_CoreInit
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b MainLoop
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.section .bss.stack
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.align 3
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_stack_base:
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.space (MAX_CPU * STACK_SZ)
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