mirror of
https://github.com/d0k3/GodMode9.git
synced 2025-06-26 21:52:48 +00:00
Enable MPU and caches on the exception handler
An (uncachable) background region makes sure no bad accesses get caught
This commit is contained in:
parent
d249b647d6
commit
d50c45ff23
4
link.ld
4
link.ld
@ -17,7 +17,7 @@ SECTIONS
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__end__ = ABSOLUTE(.);
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__end__ = ABSOLUTE(.);
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__stack_top = __start__;
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__stack_abt = __start__;
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__stack_abt = 0x8000;
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__stack_top = __start__ - 0x80000;
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__code_size__ = __end__ - __start__;
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__code_size__ = __end__ - __start__;
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}
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}
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@ -52,10 +52,9 @@ void XRQ_DumpRegisters(u32 xrq, u32 *regs)
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DsTime dstime;
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DsTime dstime;
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get_dstime(&dstime);
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get_dstime(&dstime);
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/* Dump registers */
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/* Dump registers */
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wstr += sprintf(wstr, "Exception: %s (%lu)\n", XRQ_Name[xrq&7], xrq);
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wstr += sprintf(wstr, "Exception: %s (%lu)\n", XRQ_Name[xrq&7], xrq);
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wstr += sprintf(wstr, "20%02lX-%02lX-%02lX %02lX:%02lX:%02lX\n \n",
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wstr += sprintf(wstr, "20%02lX-%02lX-%02lX %02lX:%02lX:%02lX\n\n",
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(u32) dstime.bcd_Y, (u32) dstime.bcd_M, (u32) dstime.bcd_D,
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(u32) dstime.bcd_Y, (u32) dstime.bcd_M, (u32) dstime.bcd_D,
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(u32) dstime.bcd_h, (u32) dstime.bcd_m, (u32) dstime.bcd_s);
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(u32) dstime.bcd_h, (u32) dstime.bcd_m, (u32) dstime.bcd_s);
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for (int i = 0; i < 8; i++) {
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for (int i = 0; i < 8; i++) {
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@ -65,7 +64,6 @@ void XRQ_DumpRegisters(u32 xrq, u32 *regs)
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}
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}
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wstr += sprintf(wstr, "CPSR: %08lX\n\n", regs[16]);
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wstr += sprintf(wstr, "CPSR: %08lX\n\n", regs[16]);
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/* Output registers to main screen */
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/* Output registers to main screen */
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u32 draw_width = GetDrawStringWidth(dumpstr);
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u32 draw_width = GetDrawStringWidth(dumpstr);
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u32 draw_height = GetDrawStringHeight(dumpstr);
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u32 draw_height = GetDrawStringHeight(dumpstr);
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@ -10,8 +10,9 @@
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#include <brf.h>
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#include <brf.h>
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.macro XRQ_FATAL id=0
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.macro XRQ_FATAL id=0
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adr sp, XRQ_Registers
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ldr sp, =__stack_abt
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stmia sp!, {r0-r12}
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sub sp, sp, #(18*4) @ Reserve space for registers
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stmia sp, {r0-r12}
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mov r11, #\id
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mov r11, #\id
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b XRQ_MainHandler
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b XRQ_MainHandler
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.endm
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.endm
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@ -28,10 +29,8 @@ XRQ_Vectors:
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subs pc, lr, #4 @ IRQs are unhandled
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subs pc, lr, #4 @ IRQs are unhandled
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b . @ FIQs are unused (except for debug?)
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b . @ FIQs are unused (except for debug?)
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XRQ_Registers:
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.space (17*4)
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XRQ_Reset:
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XRQ_Reset:
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msr cpsr_c, #(SR_ABT_MODE | SR_IRQ | SR_FIQ)
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XRQ_FATAL 0
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XRQ_FATAL 0
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XRQ_Undefined:
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XRQ_Undefined:
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@ -46,6 +45,7 @@ XRQ_PAbort:
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XRQ_DAbort:
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XRQ_DAbort:
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XRQ_FATAL 4
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XRQ_FATAL 4
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@ r11 = exception number
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XRQ_MainHandler:
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XRQ_MainHandler:
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mrs r10, cpsr
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mrs r10, cpsr
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mrs r9, spsr
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mrs r9, spsr
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@ -60,21 +60,47 @@ XRQ_MainHandler:
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blx r6
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blx r6
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@ Retrieve banked registers
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@ Retrieve banked registers
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and r0, r9, #(SR_PMODE_MASK)
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ands r0, r9, #(SR_PMODE_MASK & (0x0F))
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cmp r0, #(SR_USR_MODE)
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orreq r0, #(SR_SYS_MODE)
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orreq r0, #(SR_SYS_MODE)
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orr r0, #(SR_IRQ | SR_FIQ)
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orr r0, #(0x10 | SR_IRQ | SR_FIQ)
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msr cpsr_c, r0 @ Switch to previous mode
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msr cpsr_c, r0 @ Switch to previous mode
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mov r0, sp
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mov r0, sp
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mov r1, lr
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mov r1, lr
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msr cpsr_c, r10 @ Return to abort
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msr cpsr_c, r10 @ Return to abort
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stmia sp!, {r0,r1,r8,r9}
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add r2, sp, #(13*4)
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stmia r2, {r0,r1,r8,r9}
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@ Give read/write access to all the memory regions
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ldr r0, =0x33333333
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mcr p15, 0, r0, c5, c0, 2 @ write data access
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mcr p15, 0, r0, c5, c0, 3 @ write instruction access
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@ Sets MPU regions and cache settings
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adr r0, __abt_mpu_regions
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ldmia r0, {r1-r8}
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mov r0, #0b00110010 @ bootrom, arm9 mem and fcram are cacheable/bufferable
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mcr p15, 0, r1, c6, c0, 0
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mcr p15, 0, r2, c6, c1, 0
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mcr p15, 0, r3, c6, c2, 0
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mcr p15, 0, r4, c6, c3, 0
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mcr p15, 0, r5, c6, c4, 0
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mcr p15, 0, r6, c6, c5, 0
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mcr p15, 0, r7, c6, c6, 0
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mcr p15, 0, r8, c6, c7, 0
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mcr p15, 0, r0, c3, c0, 0 @ Write bufferable 0, 2, 5
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mcr p15, 0, r0, c2, c0, 0 @ Data cacheable 0, 2, 5
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mcr p15, 0, r0, c2, c0, 1 @ Inst cacheable 0, 2, 5
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@ Enable mpu/caches
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ldr r1, =(CR_ENABLE_MPU | CR_ENABLE_DCACHE | CR_ENABLE_ICACHE | CR_ENABLE_DTCM)
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mrc p15, 0, r0, c1, c0, 0
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orr r0, r0, r1
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mcr p15, 0, r0, c1, c0, 0
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ldr sp, =0x8000
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ldr r2, =XRQ_DumpRegisters @ void XRQ_DumpRegisters(u32 xrq_id, u32 *regs)
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ldr r2, =XRQ_DumpRegisters @ void XRQ_DumpRegisters(u32 xrq_id, u32 *regs)
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adr r1, XRQ_Registers
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mov r1, sp
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mov r0, r11
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mov r0, r11
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blx r2
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blx r2
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@ -86,6 +112,15 @@ XRQ_MainHandler:
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.pool
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.pool
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__abt_mpu_regions:
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.word 0x0000003F @ 00000000 4G | background region (includes IO regs)
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.word 0xFFFF001F @ FFFF0000 64k | bootrom (unprotected / protected)
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.word 0x3000801B @ 30008000 16k | dtcm
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.word 0x00000035 @ 00000000 128M | itcm
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.word 0x08000029 @ 08000000 2M | arm9 mem (O3DS / N3DS)
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.word 0x20000037 @ 20000000 256M | fcram (O3DS / N3DS)
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.word 0x1FF00027 @ 1FF00000 1M | dsp / axi wram
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.word 0x1800002D @ 18000000 8M | vram (+ 2MB)
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.global XRQ_End
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.global XRQ_End
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XRQ_End:
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XRQ_End:
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.word 0
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