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https://github.com/d0k3/GodMode9.git
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Update I2C code to newest version
This commit is contained in:
d0k3
parent
7466e0a4ea
commit
9217116a68
@ -17,112 +17,136 @@
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*/
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#include <stdbool.h>
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#include "types.h"
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#include "i2c.h"
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#define I2C1_REGS_BASE (0x10161000)
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#define REG_I2C1_DATA *((vu8* )(I2C1_REGS_BASE + 0x00))
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#define REG_I2C1_CNT *((vu8* )(I2C1_REGS_BASE + 0x01))
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#define REG_I2C1_CNTEX *((vu16*)(I2C1_REGS_BASE + 0x02))
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#define REG_I2C1_SCL *((vu16*)(I2C1_REGS_BASE + 0x04))
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#define I2C2_REGS_BASE (0x10144000)
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#define REG_I2C2_DATA *((vu8* )(I2C2_REGS_BASE + 0x00))
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#define REG_I2C2_CNT *((vu8* )(I2C2_REGS_BASE + 0x01))
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#define REG_I2C2_CNTEX *((vu16*)(I2C2_REGS_BASE + 0x02))
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#define REG_I2C2_SCL *((vu16*)(I2C2_REGS_BASE + 0x04))
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#define I2C3_REGS_BASE (0x10148000)
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#define REG_I2C3_DATA *((vu8* )(I2C3_REGS_BASE + 0x00))
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#define REG_I2C3_CNT *((vu8* )(I2C3_REGS_BASE + 0x01))
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#define REG_I2C3_CNTEX *((vu16*)(I2C3_REGS_BASE + 0x02))
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#define REG_I2C3_SCL *((vu16*)(I2C3_REGS_BASE + 0x04))
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typedef struct
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{
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vu8 REG_I2C_DATA;
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vu8 REG_I2C_CNT;
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vu16 REG_I2C_CNTEX;
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vu16 REG_I2C_SCL;
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} I2cRegs;
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static const struct
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{
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u8 busId;
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u8 devAddr;
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} i2cDevTable[] =
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{
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{0, 0x4A},
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{0, 0x7A},
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{0, 0x78},
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{1, 0x4A},
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{1, 0x78},
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{1, 0x2C},
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{1, 0x2E},
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{1, 0x40},
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{1, 0x44},
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{2, 0xA6}, // TODO: Find out if 0xA6 or 0xD6 is correct
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{2, 0xD0},
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{2, 0xD2},
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{2, 0xA4},
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{2, 0x9A},
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{2, 0xA0},
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{1, 0xEE},
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{0, 0x40},
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{2, 0x54}
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{0, 0x4A},
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{0, 0x7A},
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{0, 0x78},
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{1, 0x4A},
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{1, 0x78},
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{1, 0x2C},
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{1, 0x2E},
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{1, 0x40},
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{1, 0x44},
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{2, 0xA6}, // TODO: Find out if 0xA6 or 0xD6 is correct
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{2, 0xD0},
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{2, 0xD2},
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{2, 0xA4},
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{2, 0x9A},
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{2, 0xA0},
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{1, 0xEE},
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{0, 0x40},
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{2, 0x54}
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};
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static void i2cWaitBusy(vu8 *cntReg)
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static void i2cWaitBusy(I2cRegs *const regs)
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{
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while(*cntReg & I2C_ENABLE);
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while(regs->REG_I2C_CNT & I2C_ENABLE);
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}
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static vu8* i2cGetBusRegsBase(u8 busId)
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static I2cRegs* i2cGetBusRegsBase(u8 busId)
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{
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vu8 *base;
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if(!busId) base = (vu8*)I2C1_REGS_BASE;
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else if(busId == 1) base = (vu8*)I2C2_REGS_BASE;
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else base = (vu8*)I2C3_REGS_BASE;
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I2cRegs *base;
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switch(busId)
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{
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case 0:
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base = (I2cRegs*)I2C1_REGS_BASE;
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break;
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case 1:
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base = (I2cRegs*)I2C2_REGS_BASE;
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break;
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case 2:
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base = (I2cRegs*)I2C3_REGS_BASE;
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break;
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default:
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base = NULL;
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}
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return base;
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}
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static bool i2cStartTransfer(I2cDevice devId, u8 regAddr, bool read, vu8 *regsBase)
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void I2C_init(void)
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{
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I2cRegs *regs = i2cGetBusRegsBase(0); // Bus 1
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i2cWaitBusy(regs);
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regs->REG_I2C_CNTEX = 2; // ?
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regs->REG_I2C_SCL = 1280; // ?
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regs = i2cGetBusRegsBase(1); // Bus 2
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i2cWaitBusy(regs);
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regs->REG_I2C_CNTEX = 2; // ?
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regs->REG_I2C_SCL = 1280; // ?
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regs = i2cGetBusRegsBase(2); // Bus 3
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i2cWaitBusy(regs);
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regs->REG_I2C_CNTEX = 2; // ?
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regs->REG_I2C_SCL = 1280; // ?
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}
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static bool i2cStartTransfer(I2cDevice devId, u8 regAddr, bool read, I2cRegs *const regs)
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{
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const u8 devAddr = i2cDevTable[devId].devAddr;
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vu8 *const i2cData = regsBase;
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vu8 *const i2cCnt = regsBase + 1;
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u32 i = 0;
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for(; i < 8; i++)
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{
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i2cWaitBusy(i2cCnt);
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i2cWaitBusy(regs);
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// Select device and start.
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*i2cData = devAddr;
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*i2cCnt = I2C_ENABLE | I2C_IRQ_ENABLE | I2C_START;
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i2cWaitBusy(i2cCnt);
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if(!I2C_GET_ACK(*i2cCnt)) // If ack flag is 0 it failed.
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regs->REG_I2C_DATA = devAddr;
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regs->REG_I2C_CNT = I2C_ENABLE | I2C_IRQ_ENABLE | I2C_START;
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i2cWaitBusy(regs);
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if(!I2C_GET_ACK(regs->REG_I2C_CNT)) // If ack flag is 0 it failed.
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{
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*i2cCnt = I2C_ENABLE | I2C_IRQ_ENABLE | I2C_ERROR | I2C_STOP;
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regs->REG_I2C_CNT = I2C_ENABLE | I2C_IRQ_ENABLE | I2C_ERROR | I2C_STOP;
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continue;
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}
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// Select register and change direction to write.
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*i2cData = regAddr;
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*i2cCnt = I2C_ENABLE | I2C_IRQ_ENABLE | I2C_DIRE_WRITE;
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i2cWaitBusy(i2cCnt);
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if(!I2C_GET_ACK(*i2cCnt)) // If ack flag is 0 it failed.
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regs->REG_I2C_DATA = regAddr;
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regs->REG_I2C_CNT = I2C_ENABLE | I2C_IRQ_ENABLE | I2C_DIRE_WRITE;
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i2cWaitBusy(regs);
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if(!I2C_GET_ACK(regs->REG_I2C_CNT)) // If ack flag is 0 it failed.
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{
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*i2cCnt = I2C_ENABLE | I2C_IRQ_ENABLE | I2C_ERROR | I2C_STOP;
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regs->REG_I2C_CNT = I2C_ENABLE | I2C_IRQ_ENABLE | I2C_ERROR | I2C_STOP;
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continue;
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}
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// Select device in read mode for read transfer.
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if(read)
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{
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*i2cData = devAddr | 1u; // Set bit 0 for read.
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*i2cCnt = I2C_ENABLE | I2C_IRQ_ENABLE | I2C_START;
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i2cWaitBusy(i2cCnt);
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if(!I2C_GET_ACK(*i2cCnt)) // If ack flag is 0 it failed.
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regs->REG_I2C_DATA = devAddr | 1u; // Set bit 0 for read.
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regs->REG_I2C_CNT = I2C_ENABLE | I2C_IRQ_ENABLE | I2C_START;
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i2cWaitBusy(regs);
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if(!I2C_GET_ACK(regs->REG_I2C_CNT)) // If ack flag is 0 it failed.
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{
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*i2cCnt = I2C_ENABLE | I2C_IRQ_ENABLE | I2C_ERROR | I2C_STOP;
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regs->REG_I2C_CNT = I2C_ENABLE | I2C_IRQ_ENABLE | I2C_ERROR | I2C_STOP;
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continue;
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}
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}
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@ -134,62 +158,68 @@ static bool i2cStartTransfer(I2cDevice devId, u8 regAddr, bool read, vu8 *regsBa
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else return false;
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}
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void I2C_init(void)
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{
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i2cWaitBusy(i2cGetBusRegsBase(0) + 1);
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REG_I2C1_CNTEX = 2; // ?
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REG_I2C1_SCL = 1280; // ?
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i2cWaitBusy(i2cGetBusRegsBase(1) + 1);
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REG_I2C2_CNTEX = 2; // ?
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REG_I2C2_SCL = 1280; // ?
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i2cWaitBusy(i2cGetBusRegsBase(2) + 1);
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REG_I2C3_CNTEX = 2; // ?
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REG_I2C3_SCL = 1280; // ?
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}
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bool I2C_readRegBuf(I2cDevice devId, u8 regAddr, u8 *out, u32 size)
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{
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const u8 busId = i2cDevTable[devId].busId;
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vu8 *const i2cData = i2cGetBusRegsBase(busId);
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vu8 *const i2cCnt = i2cData + 1;
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I2cRegs *const regs = i2cGetBusRegsBase(busId);
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if(!i2cStartTransfer(devId, regAddr, true, i2cData)) return false;
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if(!i2cStartTransfer(devId, regAddr, true, regs)) return false;
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while(--size)
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{
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*i2cCnt = I2C_ENABLE | I2C_IRQ_ENABLE | I2C_DIRE_READ | I2C_ACK;
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i2cWaitBusy(i2cCnt);
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*out++ = *i2cData;
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regs->REG_I2C_CNT = I2C_ENABLE | I2C_IRQ_ENABLE | I2C_DIRE_READ | I2C_ACK;
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i2cWaitBusy(regs);
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*out++ = regs->REG_I2C_DATA;
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}
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*i2cCnt = I2C_ENABLE | I2C_IRQ_ENABLE | I2C_DIRE_READ | I2C_STOP;
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i2cWaitBusy(i2cCnt);
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*out = *i2cData; // Last byte
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regs->REG_I2C_CNT = I2C_ENABLE | I2C_IRQ_ENABLE | I2C_DIRE_READ | I2C_STOP;
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i2cWaitBusy(regs);
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*out = regs->REG_I2C_DATA; // Last byte
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return true;
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}
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bool I2C_writeReg(I2cDevice devId, u8 regAddr, u8 data)
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bool I2C_writeRegBuf(I2cDevice devId, u8 regAddr, const u8 *in, u32 size)
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{
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const u8 busId = i2cDevTable[devId].busId;
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vu8 *const i2cData = i2cGetBusRegsBase(busId);
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vu8 *const i2cCnt = i2cData + 1;
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I2cRegs *const regs = i2cGetBusRegsBase(busId);
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if(!i2cStartTransfer(devId, regAddr, false, i2cData)) return false;
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if(!i2cStartTransfer(devId, regAddr, false, regs)) return false;
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*i2cData = data;
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*i2cCnt = I2C_ENABLE | I2C_IRQ_ENABLE | I2C_DIRE_WRITE | I2C_STOP;
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i2cWaitBusy(i2cCnt);
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if(!I2C_GET_ACK(*i2cCnt)) // If ack flag is 0 it failed.
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while(--size)
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{
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*i2cCnt = I2C_ENABLE | I2C_IRQ_ENABLE | I2C_ERROR | I2C_STOP;
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regs->REG_I2C_DATA = *in++;
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regs->REG_I2C_CNT = I2C_ENABLE | I2C_IRQ_ENABLE | I2C_DIRE_WRITE;
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i2cWaitBusy(regs);
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if(!I2C_GET_ACK(regs->REG_I2C_CNT)) // If ack flag is 0 it failed.
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{
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regs->REG_I2C_CNT = I2C_ENABLE | I2C_IRQ_ENABLE | I2C_ERROR | I2C_STOP;
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return false;
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}
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}
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regs->REG_I2C_DATA = *in;
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regs->REG_I2C_CNT = I2C_ENABLE | I2C_IRQ_ENABLE | I2C_DIRE_WRITE | I2C_STOP;
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i2cWaitBusy(regs);
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if(!I2C_GET_ACK(regs->REG_I2C_CNT)) // If ack flag is 0 it failed.
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{
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regs->REG_I2C_CNT = I2C_ENABLE | I2C_IRQ_ENABLE | I2C_ERROR | I2C_STOP;
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return false;
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}
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return true;
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}
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u8 I2C_readReg(I2cDevice devId, u8 regAddr)
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{
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u8 data;
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if(!I2C_readRegBuf(devId, regAddr, &data, 1)) return 0xFF;
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return data;
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}
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bool I2C_writeReg(I2cDevice devId, u8 regAddr, u8 data)
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{
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return I2C_writeRegBuf(devId, regAddr, &data, 1);
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}
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@ -19,7 +19,7 @@
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*/
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#include <stdbool.h>
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#include "common.h"
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#include "types.h"
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#define I2C_STOP (1u)
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@ -51,6 +51,52 @@ typedef enum
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/**
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* @brief Initializes the I2C buses. Call this only once.
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*/
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void I2C_init(void);
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/**
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* @brief Reads data from a I2C register to a buffer.
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*
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* @param[in] devId The device ID. Use the enum above.
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* @param[in] regAddr The register address.
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* @param out The output buffer pointer.
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* @param[in] size The read size.
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*
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* @return Returns true on success and false on failure.
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*/
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bool I2C_readRegBuf(I2cDevice devId, u8 regAddr, u8 *out, u32 size);
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/**
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* @brief Writes a buffer to a I2C register.
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*
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* @param[in] devId The device ID. Use the enum above.
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* @param[in] regAddr The register address.
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* @param[in] in The input buffer pointer.
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* @param[in] size The write size.
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*
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* @return Returns true on success and false on failure.
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*/
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bool I2C_writeRegBuf(I2cDevice devId, u8 regAddr, const u8 *in, u32 size);
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/**
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* @brief Reads a byte from a I2C register.
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*
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* @param[in] devId The device ID. Use the enum above.
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* @param[in] regAddr The register address.
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*
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* @return Returns the value read on success otherwise 0xFF.
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*/
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u8 I2C_readReg(I2cDevice devId, u8 regAddr);
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/**
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* @brief Writes a byte to a I2C register.
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*
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* @param[in] devId The device ID. Use the enum above.
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* @param[in] regAddr The register address.
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* @param[in] data The data to write.
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*
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* @return Returns true on success and false on failure.
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*/
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bool I2C_writeReg(I2cDevice devId, u8 regAddr, u8 data);
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